1. Field of the Invention
The present invention relates to a semiconductor device using a group III nitride semiconductor.
2. Background Art
A group III nitride semiconductor is a compound semiconductor composed of a compound of aluminum (Al), boron (B), gallium (Ga) or indium (In), and nitrogen (N), described by a general formula, BwAlxGayInzN (w+x+y+z=1; 0<=w, x, y, z<=1).
Since the group III nitride semiconductor has advantages such as a large band gap and a high breakdown voltage accompanying therewith, a high electron saturated velocity and a high electron mobility, and a high concentration of electrons in a heterojunction, research and development thereof have been conducted to apply a group III nitride semiconductor to a short-wavelength light emitting device, a high-power high-frequency device, a high-frequency low-noise amplifying device, a power switch of a power source system, or the like. Especially, a heterojunction structure in which the group III nitride semiconductor layers having different composition ratios of group III elements and different band gaps are stacked, a quantum well structure or a super-lattice structure in which a plurality of the heterojunction structures are stacked are capable of controlling a modulation degree of the concentration of electrons in the device, and thus may be utilized as a basic structure for the devices described above.
FIG. 5 shows the most common form utilizing the heterojunction in the conventional nitride semiconductor device. In FIG. 5, on a substrate 11, an operation layer 12 made of gallium nitride (GaN) and a barrier layer 13 made of aluminum gallium nitride (AlGaN) are stacked in that order, wherein a heterojunction is formed at an interface where the operation layer 12 and the barrier layer 13 having band gaps different from each other are stacked thereon.
On the barrier layer 13, a source electrode 14, a drain electrode 15, and a gate electrode 16 are formed so as to operate as a Heterojunction Field Effect Transistor (hereinafter, abbreviated as HFET). The gate electrode 16 and the barrier layer 13 form a Schottky barrier. At the heterojunction interface between the barrier layer 13 and the operation layer 12, highly concentrated electrons resulting from a difference of spontaneous polarizations and a difference of piezo polarizations between the barrier layer 13 and the operation layer 12, n-type impurities doped in the barrier layer 13 according to the need, and other uncontrollable defects in the semiconductor layers are accumulated. As a result, a two-dimensional electron gas (2DEG) is formed at the heterojunction interface, in which the (2DEG) operates as a channel carrier of the field effect transistor.
One of the performance indexes for such HFET is a threshold voltage (hereinafter, referred to as Vp). Based on the Vp value being positive or negative, an operational mode of the HFET is classified as a normally-off (enhancement) mode or a normally-on (depletion) mode. In the normally-on mode, even when the voltage applied to the gate electrode is 0 V, a current flows through the source and drain electrodes, so that the source and drain electrodes are short-circuited even during a power failure, and as a result, it is not suitable for use as a switch for the power source system. Conventionally, the general HFET operates in the normally-on mode, and thus it is preferably modified to operate in the normally-off mode. As one of the methods of modifying the HFET using the group III nitride semiconductor to operate in the normally-off mode, a method of reducing a thickness of the barrier layer 13 is publicly known (for example, see Japanese Unexamined Patent Publication No. 2000-277724).
Another performance index of the HFET is a maximum current value (hereinafter, referred to as Imax), which is preferable to be as high as possible. This is because the higher Imax value allows the large current to be secured even when a gate width is narrow.
Still another performance index of the HFET is a gate-drain transconductance (hereinafter, referred to as gm), in which the gm is preferably as high as possible. The reason that a high gm is preferable is because a higher gm value results in the larger change in a signal input to the drain with respect to the change in a signal input to the gate, allowing an improvement in the degree of amplification of the signal.
Yet still another performance index of the HFET is a leakage current from the gate electrode, wherein it is preferable that the leakage current is as small as possible. The reason that it is preferable to have a leakage current in the HFET be as small as possible is because, when the leakage current flows through the gate electrode, a current output to the drain electrode is reduced and the current flows through a region where the current inherently should not flow, resulting in a problem with the operation of a circuit or the like.
It is, however, impossible to satisfy the four performance indexes of the HFET described above at once in the HFET that uses the conventional group III nitride semiconductor. The reasons thereof will be herein below described. In order to modify the HFET to operate in the normally-off mode, it is required to reduce the thickness of the barrier layer 13 directly under the gate electrode, to decrease an impurity concentration in the barrier layer 13, or to decrease an aluminum composition ratio of the barrier layer 13. Meanwhile, in order to increase Imax, it is required to increase the thickness of the barrier layer 13, to increase the impurity concentration in the barrier layer 13, or to increase the aluminum composition ratio of the barrier layer 13. Moreover, an increase in gm is achieved by increasing a capacitance per unit area directly under the gate electrode. In order to achieve it, to a reduction is required in the thickness of the barrier layer 13 directly under the gate electrode. Meanwhile, the greater the thickness of the barrier layer 13 directly under the gate electrode, or the larger the height of the bottom of a conduction band of the barrier layer 13, the further the gate leakage current may be reduced. The reason that the gate leakage current may be further reduced is because the gate leakage current is caused by a tunneling phenomena, so that the smaller the thickness of the barrier layer, and the smaller the height of the barrier, the more likely the tunneling tends to occur.